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1

[IEEE 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Athens, Greece (2017.4.3-2017.4.5)] 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Design and implementation methodology of energy-efficient Standard Cell Memory with optimized Body-Bias separation in Silicon-on-Thin-BOX

Yoshida, Yusuke, Usami, Kimiyoshi

Year:

2017

Language:

english

File:

PDF, 6.67 MB

english, 2017

2

[IEEE 2012 17th Asia and South Pacific Design Automation Conference (ASP-DAC) - Sydney, Australia (2012.01.30-2012.02.2)] 17th Asia and South Pacific Design Automation Conference - A multi-Vdd dynamic variable-pipeline on-chip router for CMPs

Matsutani, Hiroki, Hirata, Yuto, Koibuchi, Michihiro, Usami, Kimiyoshi, Nakamura, Hiroshi, Amano, Hideharu

Year:

2012

Language:

english

File:

PDF, 241 KB

english, 2012

3

[IEEE 2009 22nd International Conference on VLSI Design: concurrently with the 8th International Conference on Embedded Systems - New Delhi, India (2009.01.5-2009.01.9)] 2009 22nd International Conference on VLSI Design - Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression

Usami, Kimiyoshi, Shirai, Toshiaki, Hashida, Tasunori, Masuda, Hiroki, Takeda, Seidai, Nakata, Mitsutaka, Seki, Naomi, Amano, Hideharu, Namiki, Mitaro, Imai, Masashi, Kondo, Masaaki, Nakamura, Hiroshi

Year:

2009

Language:

english

File:

PDF, 708 KB

english, 2009

4

[IEEE 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip - Grenoble, France (2010.05.3-2010.05.6)] 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip - Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs

Matsutani, Hiroki, Koibuchi, Michihiro, Ikebuchi, Daisuke, Usami, Kimiyoshi, Nakamura, Hiroshi, Amano, Hideharu

Year:

2010

Language:

english

File:

PDF, 357 KB

english, 2010

5

[IEEE 2006 International Conference on Computer Design - San Jose, CA, USA (2007.10.1-2007.10.4)] 2006 International Conference on Computer Design - A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals

Usami, Kimiyoshi, Ohkubo, Naoaki

Year:

2006

Language:

english

File:

PDF, 368 KB

english, 2006

6

[ACM Press the 1995 international symposium - Dana Point, California, United States (1995.04.23-1995.04.26)] Proceedings of the 1995 international symposium on Low power design - ISLPED '95 - Clustered voltage scaling technique for low-power design

Usami, Kimiyoshi, Horowitz, Mark

Year:

1995

File:

PDF, 286 KB

1995

7

[IEEE 2012 IEEE 6th International Symposium on Embedded Multicore Socs (MCSoC) - Aizu-Wakamatsu, Fukushima, Japan (2012.09.20-2012.09.22)] 2012 IEEE 6th International Symposium on Embedded Multicore SoCs - Fine-Grained Power Control Using A Multi-Voltage Variable Pipeline Router

Nakamura, Takeo, Matsutani, Hiroki, Koibuchi, Michihiro, Usami, Kimiyoshi, Amano, Hideharu

Year:

2012

Language:

english

File:

PDF, 310 KB

english, 2012

8

[IEEE Conference Publications Design Automation and Test in Europe - Dresden, Germany (2014.03.24-2014.03.28)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 - Design and evaluation of fine-grained power-gating for embedded microprocessors

Kondo, Masaaki, Kobyashi, Hiroaki, Sakamoto, Ryuichi, Wada, Motoki, Tsukamoto, Jun, Namiki, Mitaro, Wang, Weihan, Amano, Hideharu, Matsunaga, Kensaku, Kudo, Masaru, Usami, Kimiyoshi, Komoda, Toshiya,

Year:

2014

Language:

english

File:

PDF, 460 KB

english, 2014

9

[IEEE 2010 11th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2010.03.22-2010.03.24)] 2010 11th International Symposium on Quality Electronic Design (ISQED) - Adaptive power gating for function units in a microprocessor

Usami, Kimiyoshi, Hashida, Tatsunori, Koyama, Satoshi, Yamamoto, Tatsuya, Ikebuchi, Daisuke, Amano, Hideharu, Namiki, Mitaro, Kondo, Masaaki, Nakamura, Hiroshi

Year:

2010

Language:

english

File:

PDF, 321 KB

english, 2010

10

[IEEE 2008 International Conference on Field-Programmable Technology (FPT) - Taipei, Taiwan (2008.12.8-2008.12.10)] 2008 International Conference on Field-Programmable Technology - Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique

Saito, Yoshiki, Shirai, Tomoaki, Nakamura, Takuro, Nishimura, Takashi, Hasegawa, Yohei, Tsutsumi, Satoshi, Kashima, Toshihiro, Nakata, Mitsutaka, Takeda, Seidai, Usami, Kimiyoshi, Amano, Hideharu

Year:

2008

Language:

english

File:

PDF, 154 KB

english, 2008

11

A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface

Miura, Noriyuki, Koizumi, Yusuke, Take, Yasuhiro, Matsutani, Hiroki, Kuroda, Tadahiro, Amano, Hideharu, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, Hiroshi

Journal:

Year:

2013

Language:

english

File:

PDF, 1.96 MB

english, 2013

12

[IEEE 2012 13th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2012.03.19-2012.03.21)] Thirteenth International Symposium on Quality Electronic Design (ISQED) - Efficient leakage power saving by sleep depth controlling for Multi-mode Power Gating

Takeda, Seidai, Miwa, Shinobu, Usami, Kimiyoshi, Nakamura, Hiroshi

Year:

2012

Language:

english

File:

PDF, 418 KB

english, 2012

13

[IEEE 2011 IEEE Cool Chips XIV - Yokohama, Japan (2011.04.20-2011.04.22)] 2011 IEEE Cool Chips XIV - SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator

Ozaki, Nobuaki, Usami, Kimiyoshi, Amano, Hideharu, Namiki, Mitaro, Nakamura, Hiroshi, Kondo, Masaaki

Year:

2011

Language:

english

File:

PDF, 795 KB

english, 2011

14

[IEEE 2008 Design, Automation and Test in Europe - Munich, Germany (2008.03.10-2008.03.14)] 2008 Design, Automation and Test in Europe - Power Gating for Ultra-low Leakage: Physics, Design, and Analysis

Frenkil, Jerry, Frenkil, Jerry, Choi, Ken, Usami, Kimiyoshi

Year:

2008

Language:

english

File:

PDF, 80 KB

english, 2008

15

[IEEE 2011 International Symposium on Low Power Electronics and Design (ISLPED) - Fukuoka, Japan (2011.08.1-2011.08.3)] IEEE/ACM International Symposium on Low Power Electronics and Design - On-chip detection methodology for break-even time of power gated function units

Usami, Kimiyoshi, Goto, Yuya, Matsunaga, Kensaku, Koyama, Satoshi, Ikebuchi, Daisuke, Amano, Hideharu, Nakamura, Hiroshi

Year:

2011

Language:

english

File:

PDF, 667 KB

english, 2011

16

[IEEE 2012 22nd International Conference on Field Programmable Logic and Applications (FPL) - Oslo, Norway (2012.08.29-2012.08.31)] 22nd International Conference on Field Programmable Logic and Applications (FPL) - CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect

Koizumi, Yusuke, Sasaki, Eiichi, Amano, Hideharu, Matsutani, Hiroki, Take, Yasuhiro, Kuroda, Tadahiro, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, Hiroshi

Year:

2012

Language:

english

File:

PDF, 2.60 MB

english, 2012

17

[IEEE 2014 IEEE COOL Chips XVII (COOL Chips) - Yokohama, Japan (2014.4.14-2014.4.16)] 2014 IEEE COOL Chips XVII - A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Ishibashi, Koichiro, Sugii, Nobuyuki, Usami, Kimiyoshi, Amano, Hideharu, Kobayashi, Kazutoshi, Cong-Kha Pham,, Makiyama, Hideki, Yamamoto, Yoshiki, Shinohara, Hirofumi, Iwamatsu, Toshiaki, Yamaguchi,

Year:

2014

Language:

english

File:

PDF, 874 KB

english, 2014

18

[IEEE 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) - Singapore (2014.01.20-2014.01.23)] 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) - Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors

Usami, Kimiyoshi, Kudo, Masaru, Matsunaga, Kensaku, Kosaka, Tsubasa, Tsurui, Yoshihiro, Wang, Weihan, Amano, Hideharu, Kobayashi, Hiroaki, Sakamoto, Ryuichi, Namiki, Mitaro, Kondo, Masaaki, Nakamura,

Year:

2014

Language:

english

File:

PDF, 361 KB

english, 2014

19

[IEEE 2008 IEEE International Conference on Computer Design (ICCD) - Lake Tahoe, CA, USA (2008.10.12-2008.10.15)] 2008 IEEE International Conference on Computer Design - A fine-grain dynamic sleep control scheme in MIPS R3000

Naomi Seki,, Lei Zhao,, Jo Kei,, Daisuke Ikebuchi,, Yu Kojima,, Yohei Hasegawa,, Hideharu Amano,, Kashima, Toshihiro, Seidai Takeda,, Toshiaki Shirai,, Mitustaka Nakata,, Usami, Kimiyoshi, T

Year:

2008

Language:

english

File:

PDF, 773 KB

english, 2008

20

[IEEE 2009 IEEE International Conference on IC Design and Technology (ICICDT) - Austin, TX, USA (2009.05.18-2009.05.20)] 2009 IEEE International Conference on IC Design and Technology - Implementation and evaluation of fine-grain run-time power gating for a multiplier

Usami, Kimiyoshi, Mitsutaka Nakata,, Toshiaki Shirai,, Seidai Takeda,, Seki, Naomi, Hideharu Amano,, Hiroshi Nakamura,

Year:

2009

Language:

english

File:

PDF, 552 KB

english, 2009

21

[IEEE 2013 23rd International Conference on Field Programmable Logic and Applications (FPL) - Porto, Portugal (2013.09.2-2013.09.4)] 2013 23rd International Conference on Field programmable Logic and Applications - Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links

Koizumi, Yusuke, Miura, Noriyuki, Take, Yasuhiro, Matsutani, Hiroki, Kuroda, Tadahiro, Amano, Hideharu, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, Hiroshi

Year:

2013

Language:

english

File:

PDF, 211 KB

english, 2013

22

[IEEE 2007 Asia and South Pacific Design Automation Conference - Yokohama, Japan (2007.01.23-2007.01.26)] 2007 Asia and South Pacific Design Automation Conference - Overview on Low Power SoC Design Technology

Usami, Kimiyoshi

Year:

2007

Language:

english

File:

PDF, 2.90 MB

english, 2007

23

[IEEE 2012 IEEE Cool Chips XV - Yokohama, Japan (2012.04.18-2012.04.20)] 2012 IEEE COOL Chips XV - Trade-off analysis of fine-grained power gating methods for functional units in a CPU

Weihan Wang,, Ohta, Yuya, Ishii, Yoshifumi, Usami, Kimiyoshi, Amano, Hideharu

Year:

2012

Language:

english

File:

PDF, 438 KB

english, 2012

24

[IEEE 2012 International Conference on Field-Programmable Technology (FPT) - Seoul, Korea (South) (2012.12.10-2012.12.12)] 2012 International Conference on Field-Programmable Technology - Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect

Koizumi, Yusuke, Amano, Hideharu, Matsutani, Hiroki, Miura, Noriyuki, Kuroda, Tadahiro, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, Hiroshi

Year:

2012

Language:

english

File:

PDF, 6.35 MB

english, 2012

25

CODE COVERAGE-BASED POWER ESTIMATION TECHNIQUES FOR MICROPROCESSORS

QU, GANG, KAWABE, NAOYUKI, USAMI, KIMIYOSHI, POTKONJAK, MIODRAG

Journal:

Journal of Circuits System and Computers

Year:

2002

Language:

english

File:

PDF, 250 KB

english, 2002

26

[IEEE 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Bologna, Italy (2015.1.26-2015.1.28)] EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon - Measurement of the minimum energy point in Silicon on Thin-BOX(SOTB) and bulk MOSFET

Nakamura, Shohei, Kawasaki, Jun, Kumagai, Yuichi, Usami, Kimiyoshi

Year:

2015

Language:

english

File:

PDF, 1.29 MB

english, 2015

27

[IEEE 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Bologna, Italy (2015.1.26-2015.1.28)] EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon - Power gating for FDSOI using dynamically body-biased power switch

Kumagai, Yuichi, Kudo, Masaru, Usami, Kimiyoshi

Year:

2015

Language:

english

File:

PDF, 373 KB

english, 2015

28

[ACM Press the 1997 international symposium - Monterey, California, United States (1997.08.18-1997.08.20)] Proceedings of the 1997 international symposium on Low power electronics and design - ISLPED '97 - A low-power design method using multiple supply voltages

Igarashi, Mutsunori, Kanazawa, Masahiro, Sonoda, Shinji, Ichida, Makoto, Hatanaka, Naoyuki, Usami, Kimiyoshi, Nogami, Kazutaka, Minami, Fumihiro, Kawasaki, Yukio, Aoki, Takahiro, Takano, Midori, Mizun

Year:

1997

Language:

english

File:

PDF, 716 KB

english, 1997

29

[ACM Press Conference proceedings - Orlando, Florida, United States (1990.06.24-1990.06.27)] Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90 - Datapath generator based on gate-level symbolic layout

Matsumoto, Nobu, Watanabe, Yoko, Usami, Kimiyoshi, Sugeno, Yukio, Hatada, Hiroshi, Mori, Shojiro

Year:

1990

Language:

english

File:

PDF, 759 KB

english, 1990

30

[ACM Press the great lakes symposium - Salt Lake City, Utah, USA (2012.05.03-2012.05.04)] Proceedings of the great lakes symposium on VLSI - GLSVLSI '12 - Stepwise sleep depth control for run-time leakage power saving

Takeda, Seidai, Miwa, Shinobu, Usami, Kimiyoshi, Nakamura, Hiroshi

Year:

2012

Language:

english

File:

PDF, 925 KB

english, 2012

31

[ACM Press the 2006 conference - Yokohama, Japan (2006.01.24-2006.01.27)] Proceedings of the 2006 conference on Asia South Pacific design automation - ASP-DAC '06 - Delay modeling and static timing analysis for MTCMOS circuits

Ohkubo, Naoaki, Usami, Kimiyoshi

Year:

2006

Language:

english

File:

PDF, 282 KB

english, 2006

32

[ACM Press the 2002 international symposium - Monterey, California, USA (2002.08.12-2002.08.14)] Proceedings of the 2002 international symposium on Low power electronics and design - ISLPED '02 - Automated selective multi-threshold design for ultra-low standby applications

Usami, Kimiyoshi, Kawabe, Naoyuki, Koizumi, Masayuki, Seta, Katsuhiro, Furusawa, Toshiyuki

Year:

2002

Language:

english

File:

PDF, 256 KB

english, 2002

33

[ACM Press the 37th conference - Los Angeles, California, United States (2000.06.05-2000.06.09)] Proceedings of the 37th conference on Design automation - DAC '00 - Function-level power estimation methodology for microprocessors

Qu, Gang, Kawabe, Naoyuki, Usami, Kimiyoshi, Potkonjak, Miodrag

Year:

2000

Language:

english

File:

PDF, 78 KB

english, 2000

34

[IEEE 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC) - Aizu-Wakamatsu, Japan (2014.9.23-2014.9.25)] 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs - A Thermal Management System for Building Block Computing Systems

Fujita, Yu, Usami, Kimiyoshi, Amano, Hideharu

Year:

2014

Language:

english

File:

PDF, 691 KB

english, 2014

35

[IEEE 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) - Rome, Italy (2015.7.22-2015.7.24)] 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) - An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

Okuhara, Hayate, Kitamori, Kuniaki, Fujita, Yu, Usami, Kimiyoshi, Amano, Hideharu

Year:

2015

Language:

english

File:

PDF, 1.09 MB

english, 2015

36

[IEEE 2015 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XVIII) - Yokohama, Japan (2015.4.13-2015.4.15)] 2015 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XVIII) - A leakage current monitor circuit using silicon on thin BOX MOSFET for dynamic back gate bias control

Okuhara, Hayate, Usami, Kimiyoshi, Amano, Hideharu

Year:

2015

Language:

english

File:

PDF, 675 KB

english, 2015

37

[IEEE 2014 International Symposium on System-on-Chip (SoC) - Tampere, Finland (2014.10.28-2014.10.29)] 2014 International Symposium on System-on-Chip (SoC) - Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating

Usami, Kimiyoshi, Miyauchi, Makoto, Kudo, Masaru, Takagi, Kazumitsu, Amano, Hideharu, Namiki, Mitaro, Kondo, Masaaki, Nakamura, Hiroshi

Year:

2014

Language:

english

File:

PDF, 847 KB

english, 2014

38

A Scalable 3D Heterogeneous Multi-Core Processor with Inductive-Coupling ThruChip Interface

Koizumi, Yusuke, Miura, Noriyuki, Sasaki, Eiichi, Take, Yasuhiro, Matsutani, Hiroki, Kuroda, Tadahiro, Amano, Hideharu, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, H

Journal:

Year:

2014

Language:

english

File:

PDF, 385 KB

english, 2014

39

[IEEE 2008 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2008.11.24-2008.11.25)] 2008 International SoC Design Conference - Hybrid design of dual Vth and power gating to reduce leakage power under Vth variations

Shirai, Toshiaki, Usami, Kimiyoshi

Year:

2008

File:

PDF, 170 KB

2008

40

[IEEE 2008 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2008.11.24-2008.11.25)] 2008 International SoC Design Conference - Hybrid design of dual Vth and power gating to reduce leakage power under Vth variations

Shirai, Toshiaki, Usami, Kimiyoshi

Year:

2008

Language:

english

File:

PDF, 170 KB

english, 2008

41

[IEEE 2014 IEEE Hot Chips 26 Symposium (HCS) - Cupertino, CA, USA (2014.8.10-2014.8.12)] 2014 IEEE Hot Chips 26 Symposium (HCS) - A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Kamohara, Shiro, Sugii, Nobuyuki, Ishibashi, Koichiro, Usami, Kimiyoshi, Amano, Hideharu, Kobayashi, Kazutoshi, Pham, Cong-Kha

Year:

2014

File:

PDF, 1.34 MB

2014

42

Let’s go to IEICE Workshops!

USAMI, Kimiyoshi

Journal:

IEICE ESS Fundamentals Review

Year:

2011

File:

PDF, 258 KB

2011

43

Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units

Lei, Zhao, Ikebuchi, Daisuke, Usami, Kimiyoshi, Namiki, Mitaro, Kondo, Masaaki, Nakamura, Hiroshi, Amano, Hideharu

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2011

Language:

english

File:

PDF, 1.22 MB

english, 2011

44

An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications

KOSHIBA, Atsushi, SATO, Mikiko, USAMI, Kimiyoshi, AMANO, Hideharu, SAKAMOTO, Ryuichi, KONDO, Masaaki, NAKAMURA, Hiroshi, NAMIKI, Mitaro

Journal:

IEICE Transactions on Electronics

Year:

2016

Language:

english

File:

PDF, 2.66 MB

english, 2016

45

[IEEE 2013 IEEE Hot Chips 25 Symposium (HCS) - Stanford, CA (2013.8.25-2013.8.27)] 2013 IEEE Hot Chips 25 Symposium (HCS) - A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface

Miura, Noriyuki, Koizumi, Yusuke, Sasaki, Eiichi, Take, Yasuhiro, Matsutani, Hiroki, Kuroda, Tadahiro, Amano, Hideharu, Sakamoto, Ryuichi, Namiki, Mitaro, Usami, Kimiyoshi, Kondo, Masaaki, Nakamura, H

Year:

2013

Language:

english

File:

PDF, 15.17 MB

english, 2013

46

Power Optimization Methodology for Ultralow Power Microcontroller With Silicon on Thin BOX MOSFET

Okuhara, Hayate, Fujita, Yu, Usami, Kimiyoshi, Amano, Hideharu

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2017

Language:

english

File:

PDF, 1.23 MB

english, 2017

47

[IEEE 2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Abu Dhabi (2017.10.23-2017.10.25)] 2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Level-shifter-less approach for multi-VDD design to use body bias control in FD-SOI

Usami, Kimiyoshi, Kogure, Shunsuke, Yoshida, Yusuke, Magasaki, Ryo, Amano, Hideharu

Year:

2017

Language:

english

File:

PDF, 375 KB

english, 2017

48

[IEEE 2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA) - Hsinchu, Taiwan (2017.8.16-2017.8.18)] 2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA) - Nonvolatile power gating with MTJ based nonvolatile flip-flops for a microprocessor

Kudo, Masaru, Usami, Kimiyoshi

Year:

2017

Language:

english

File:

PDF, 929 KB

english, 2017

49

[IEEE 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - Burlingame, CA, USA (2017.10.16-2017.10.19)] 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - Level-shifter free approach for multi-Vdd SOTB employing adaptive Vt modulation for pMOSFET

Usami, Kimiyoshi, Kogure, Shunsuke, Yoshida, Yusuke, Magasaki, Ryo, Amano, Hideharu

Year:

2017

Language:

english

File:

PDF, 1.26 MB

english, 2017

50

[IEEE 2017 International SoC Design Conference (ISOCC) - Seoul (2017.11.5-2017.11.8)] 2017 International SoC Design Conference (ISOCC) - Building block multi-chip systems using inductive coupling through chip interface

Amano, Hideharu, Kuroda, Tadahiro, Nakamura, Hiroshi, Usami, Kimiyoshi, Kondo, Masaaki, Matsutani, Hiroki, Namiki, Mitaro

Year:

2017

Language:

english

File:

PDF, 348 KB

english, 2017